- Sandisk says 3D Matrix Reminiscence shall be an inexpensive substitute for DRAM
- Will ship DRAM-like efficiency at 4x the capability and half the fee
- Sandisk says it’ll change into extra inexpensive because the expertise matures
At its latest Sandisk 2.0 investor day session, the flash storage large unveiled a sequence of recent SSDs, together with a 128TB knowledge heart mannequin, whereas outlining its formidable roadmap for even bigger drives – a 256TB SSD in 2026, a 512TB SSD in 2027, and a whopping 1PB drive anticipated just a few years later.
Sandisk is eager to calm any investor wobbles following its cut up from Western Digital, and past discussing its technique to spice up returns and margins, the corporate additionally took the wraps off its groundbreaking 3D Matrix Reminiscence, a scalable reminiscence expertise that reportedly guarantees DRAM-like efficiency at 4 occasions the capability and half the fee.
Sandisk has positioned 3D Matrix Reminiscence as an inexpensive resolution in response to the tip of Moore’s Legislation for DRAM, the place scaling stagnation, a widening compute-memory hole, and hovering reminiscence prices have change into main challenges. The corporate says its scalable reminiscence structure will break by means of the “reminiscence wall”, fixing the issue of reminiscence capability and bandwidth struggling to maintain tempo with ever-increasing processing calls for.
Extra cost-efficient
Developed in collaboration with IMEC, Sandisk’s 3D Matrix Reminiscence is constructed on a dense array structure that includes a novel reminiscence cell design whereas sustaining compatibility with open business requirements, similar to CXL.
The corporate claims its new reminiscence tech will change into more and more extra cost-efficient over time. Based on a graph Sandisk shared, by Yr 6, 3D Matrix Reminiscence will obtain over 50% price financial savings per bit in comparison with DRAM, with a considerably steeper decline in $/GB, making it a extra inexpensive different to conventional DRAM options.
The corporate’s improvement roadmap, proven beneath, outlines quite a few milestones, with transitioning from a 150mm WD Analysis Fab to a 300mm IMEC Facility in 2024, marking the tech’s first important step towards large-scale manufacturing.
Starting in 2017, the undertaking has advanced from remoted gadgets to passive arrays, to CMOS improvement automobiles. Gen1 media samples would be the subsequent massive step and these are anticipated to achieve 32-64Gbit capacities, though there aren’t any particulars about uncooked efficiency, as of but.